Such output driver circuits are known from prior art e.g. as bus driver circuits. Output driver circuits as integrated circuits are required in general to reverse the charge of relatively high capacitances as may occur in conjunction with e.g. data and clock inputs. Reversing the charge of the high load capacitance at the output of driver circuits results in noise voltages in the bonding leads to the output driver forming the parasitic inductances which may become so high that a circuit failure occurs.
Referring now to FIG. 1, there is illustrated diagrammatically an output driver circuit including an input stage and an output stage to which respectively an input voltage Vin and an output voltage Vout is applied. Both the input stage and the output stage receive a supply voltage Vcc. The parasitic inductances of the terminal leads for the supply voltage and ground terminal are identified in FIG. 1 by L1 and L2 respectively. The terminal leads may be e.g. bonding leads.
Referring now to FIG. 2, there is illustrated the effect of the parasitic inductances on the supply voltage Vcc and ground potential Vgnd when a current is applied to the output of the output stage flowing via the Vcc and GND terminals. Assuming now that a slowly increasing voltage, indicated by the broken line in FIG. 2, is applied to the terminal Vin at the input stage and that the circuit is configured so that as soon as the input voltage Vin applied to the input stage has achieved a value at which the difference amount between the input voltage Vin and supply voltage Vcc drops below a critical threshold ΔVs, a switching action is activated in the output stage, resulting in a load capacitance at the output of the output stage being charged via the supply voltage, then a high current flows from the Vcc terminal via the parasitic inductance L1, the output stage, the parasitic inductance L2 and the ground terminal. It is due to these parasitic inductances that noise voltages materialize which cause a shift in the level of the supply voltage Vcc and ground voltage Vgnd, illustrated in FIG. 2 by the two oscillations which pass through the supply voltage and the ground voltage. These oscillations cause a change in the ratio of the supply voltage to the input voltage such that the switching threshold ΔVs for activating the output stage is again violated which may result in the flow of current in the output stage again being deactivated. This may result in e.g. a digital signal generated at the output of the output stage assuming a wrong value.